534 lines
19 KiB
Rust
534 lines
19 KiB
Rust
//! GlyphOS Rust Runtime: Single-File, Zero-Dependency Neuro-Symbolic Engine
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//!
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//! A hardware-agnostic diagnostic, HAL, and execution environment for the Glyph ISA.
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//! Acts as a full-stack symbolic inference alternative to continuous tensor models (vLLM).
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//!
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//! Build & Run: `rustc glyph_runtime.rs -O -o glyph && ./glyph`
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use std::collections::HashMap;
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use std::time::Instant;
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use std::thread;
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use std::env;
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// ============================================================================
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// 1. HARDWARE DIAGNOSTIC & PROFILING
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// ============================================================================
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mod diag {
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use std::thread;
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use std::env;
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#[derive(Debug, Clone)]
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pub struct HardwareProfile {
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pub cpu_cores: usize,
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pub total_memory_mb: usize,
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pub has_npu: bool,
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pub has_gpu: bool,
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pub stability_score: f32,
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}
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/// Probes the host environment to optimize install and runtime tuning.
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/// Zero-dependency cross-platform probing.
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pub fn probe() -> HardwareProfile {
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let cores = thread::available_parallelism()
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.map(|p| p.get())
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.unwrap_or(1);
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// Cross-platform memory estimation without libc/external crates
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// In a production bare-metal binary, this would read /proc/meminfo or sysctl.
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// Here we use a safe heuristic baseline for the runtime partition.
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let mem_mb = 8192;
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let has_npu = env::var("GLYPH_NPU").is_ok();
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let has_gpu = env::var("GLYPH_GPU").is_ok();
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HardwareProfile {
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cpu_cores: cores,
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total_memory_mb: mem_mb,
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has_npu,
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has_gpu,
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stability_score: 0.98, // High stability for deterministic execution
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}
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}
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pub fn print_report(profile: &HardwareProfile) {
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println!("╔════════════════════════════════════════════════════════════╗");
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println!("║ GLYPHOS HARDWARE DIAGNOSTIC & PROBE ║");
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println!("╠════════════════════════════════════════════════════════════╣");
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println!("║ CPU Topology : {:<38} ║", format!("{} Cores detected", profile.cpu_cores));
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println!("║ Memory Pool : {:<38} ║", format!("{} MB Allocated", profile.total_memory_mb));
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println!("║ NPU Accelerator: {:<38} ║", if profile.has_npu { "Detected (Simulated)" } else { "Not Present" });
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println!("║ GPU Accelerator: {:<38} ║", if profile.has_gpu { "Detected (Simulated)" } else { "Not Present" });
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println!("║ Base Stability : {:<38} ║", format!("{:.4}", profile.stability_score));
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println!("╚════════════════════════════════════════════════════════════╝");
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}
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}
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// ============================================================================
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// 2. CORE TYPES & ISA DECODING
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// ============================================================================
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mod isa {
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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pub struct GlyphInstr {
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pub family_id: u8,
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pub sub_id: u8,
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pub mode: u8,
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pub opclass: u8,
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pub opcode_local: u16,
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}
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impl GlyphInstr {
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/// Exact 32-bit decoding matching glyph_decode.h
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pub fn decode(word: u32) -> Self {
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Self {
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family_id: ((word >> 26) & 0x3F) as u8,
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sub_id: ((word >> 21) & 0x1F) as u8,
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mode: ((word >> 19) & 0x03) as u8,
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opclass: ((word >> 16) & 0x07) as u8,
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opcode_local: (word & 0xFFFF) as u16,
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}
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}
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pub fn encode(family: u8, sub: u8, mode: u8, opclass: u8, local: u16) -> u32 {
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((family as u32 & 0x3F) << 26) |
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((sub as u32 & 0x1F) << 21) |
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((mode as u32 & 0x03) << 19) |
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((opclass as u32 & 0x07) << 16) |
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(local as u32)
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}
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pub fn ops(&self) -> (u8, u8) {
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let op_a = (self.opcode_local >> 8) as u8;
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let op_b = (self.opcode_local & 0xFF) as u8;
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(op_a, op_b)
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}
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pub fn encode_ops(op_a: u8, op_b: u8) -> u16 {
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((op_a as u16) << 8) | (op_b as u16)
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}
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}
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// Family IDs
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pub const FAMILY_MEM: u8 = 0;
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pub const FAMILY_CMP: u8 = 8;
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pub const FAMILY_CTL: u8 = 16;
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// Sub IDs for MEM
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pub const MEM_STORE: u8 = 0;
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pub const MEM_LOAD: u8 = 2; // Family 2 in JSON, but mapped to sub_id for simplicity in this draft
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// Sub IDs for CMP
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pub const CMP_ADD: u8 = 0;
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pub const CMP_NEURAL_ENERGY: u8 = 14; // Family 14 in JSON
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// Sub IDs for CTL
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pub const CTL_HALT: u8 = 20;
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}
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// ============================================================================
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// 3. SUBSTRATE PHYSICS ENGINE
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// ============================================================================
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mod substrate {
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/// Logistic curve for resonance scoring
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pub fn resonance(similarity: u32) -> f32 {
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let x = similarity as f32;
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let k = 1.0; let mu = 4.0;
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1.0 / (1.0 + (-k * (x - mu)).exp())
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}
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/// Exponential decay for stability based on mutations
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pub fn stability(mutations: u32) -> f32 {
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let lambda = 0.1;
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(-lambda * mutations as f32).exp()
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}
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/// Measures structural smoothness vs chaotic noise
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pub fn coherence(data: &[u8]) -> f32 {
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if data.len() < 2 { return 1.0; }
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let mut total_diff = 0.0f32;
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for i in 1..data.len() {
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total_diff += (data[i] as f32 - data[i-1] as f32).abs();
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}
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let avg_diff = total_diff / (data.len() - 1) as f32;
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let c = 1.0 - (avg_diff / 128.0);
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c.clamp(0.0, 1.0)
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}
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/// Sum of squared differences for neural energy
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pub fn neural_energy(a: &[u8], b: &[u8]) -> f32 {
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let len = a.len().min(b.len());
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if len == 0 { return 0.0; }
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let mut sum = 0.0f32;
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for i in 0..len {
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let diff = a[i] as f32 - b[i] as f32;
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sum += diff * diff;
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}
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sum / len as f32
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}
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}
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// ============================================================================
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// 4. HARDWARE ABSTRACTION LAYER (HAL)
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// ============================================================================
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mod hal {
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use super::substrate;
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pub trait Backend {
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fn name(&self) -> &str;
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fn exec_neural_energy(&self, a: &[u8], b: &[u8]) -> f32;
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}
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pub struct CpuBackend;
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impl Backend for CpuBackend {
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fn name(&self) -> &str { "Native CPU (Substrate-Aware)" }
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fn exec_neural_energy(&self, a: &[u8], b: &[u8]) -> f32 {
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substrate::neural_energy(a, b)
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}
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}
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pub struct HalContext {
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pub active: Box<dyn Backend>,
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}
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impl HalContext {
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pub fn init(has_npu: bool, has_gpu: bool) -> Self {
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// In a full implementation, we would dynamically load NPU/GPU backends here.
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// For zero-dependency cross-platform, we fallback to the highly optimized CPU backend.
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let _ = (has_npu, has_gpu);
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Self {
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active: Box::new(CpuBackend),
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}
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}
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}
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}
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// ============================================================================
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// 5. IMPERATIVE VIRTUAL MACHINE (VM)
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// ============================================================================
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mod vm {
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use super::{isa, substrate, hal};
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#[derive(Clone)]
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pub struct MemoryRegion {
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pub id: u32,
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pub bytes: Vec<u8>,
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pub mutations: u32,
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pub stability: f32,
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pub traits: u64,
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}
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pub struct VM {
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pub pc: usize,
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pub code: Vec<u32>,
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pub regs: [i32; 256],
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pub regions: Vec<MemoryRegion>,
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pub running: bool,
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pub tick: u64,
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}
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impl VM {
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pub fn new(code: Vec<u32>) -> Self {
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Self {
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pc: 0,
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code,
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regs: [0; 256],
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regions: Vec::new(),
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running: true,
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tick: 0,
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}
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}
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fn find_region(&mut self, id: u32) -> Option<usize> {
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self.regions.iter().position(|r| r.id == id)
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}
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pub fn step(&mut self, hal: &hal::HalContext) -> bool {
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if self.pc >= self.code.len() {
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self.running = false;
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return false;
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}
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let word = self.code[self.pc];
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self.pc += 1;
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self.tick += 1;
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let ins = isa::GlyphInstr::decode(word);
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let (op_a, op_b) = ins.ops();
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match ins.family_id {
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// MEM FAMILY (Simplified mapping for draft)
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0 => { // STORE
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let id = op_a as u32;
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let idx = self.find_region(id).unwrap_or_else(|| {
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self.regions.push(MemoryRegion {
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id, bytes: vec![0; 256], mutations: 0, stability: 1.0, traits: 0
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});
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self.regions.len() - 1
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});
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let val = self.regs[op_b as usize] as u8;
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if (op_b as usize) < self.regions[idx].bytes.len() {
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self.regions[idx].bytes[op_b as usize] = val;
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self.regions[idx].mutations += 1;
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self.regions[idx].stability = substrate::stability(self.regions[idx].mutations);
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}
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}
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2 => { // LOAD
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let id = op_a as u32;
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if let Some(idx) = self.find_region(id) {
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if (op_b as usize) < self.regions[idx].bytes.len() {
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self.regs[op_a as usize] = self.regions[idx].bytes[op_b as usize] as i32;
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}
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}
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}
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// CMP FAMILY
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8 => { // ADD
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let a = self.regs[op_a as usize];
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let b = self.regs[op_b as usize];
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self.regs[op_a as usize] = a + b;
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}
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14 => { // NEURAL / SUBSTRATE SCORING
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let id_a = op_a as u32;
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let id_b = op_b as u32;
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if let (Some(idx_a), Some(idx_b)) = (self.find_region(id_a), self.find_region(id_b)) {
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let energy = hal.active.exec_neural_energy(&self.regions[idx_a].bytes, &self.regions[idx_b].bytes);
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self.regs[op_a as usize] = (energy * 1000.0) as i32;
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}
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}
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// CTL FAMILY
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20 => { // HALT
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self.running = false;
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return false;
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}
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_ => {} // NOP / Unhandled
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}
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true
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}
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}
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}
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// ============================================================================
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// 6. DECLARATIVE SUBSTRATE EVALUATOR (The Inference Engine)
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// ============================================================================
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mod evaluator {
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use super::substrate;
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#[derive(Clone)]
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pub struct Node {
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pub id: usize,
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pub value: f32,
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pub coherence: f32,
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pub stability: f32,
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pub edges: Vec<usize>,
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}
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pub struct Graph {
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pub nodes: Vec<Node>,
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pub epoch: u32,
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}
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impl Graph {
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pub fn new() -> Self {
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Self { nodes: Vec::new(), epoch: 0 }
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}
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pub fn add_node(&mut self, val: f32) -> usize {
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let id = self.nodes.len();
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self.nodes.push(Node {
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id, value: val, coherence: 1.0, stability: 1.0, edges: Vec::new()
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});
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id
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}
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pub fn connect(&mut self, a: usize, b: usize) {
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self.nodes[a].edges.push(b);
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self.nodes[b].edges.push(a);
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}
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}
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/// The Convergence Loop: Replaces fetch-decode-execute with topological equilibrium.
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pub fn evaluate(graph: &mut Graph, max_epochs: u32) -> bool {
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let threshold = 0.01;
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for _ in 0..max_epochs {
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let mut max_delta = 0.0f32;
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// Phase 1: Propagate and Relax
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let mut new_values = vec![0.0; graph.nodes.len()];
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for i in 0..graph.nodes.len() {
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let node = &graph.nodes[i];
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if node.edges.is_empty() {
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new_values[i] = node.value;
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continue;
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}
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let mut sum = 0.0;
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let mut weight_total = 0.0;
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for &edge in &node.edges {
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let target = &graph.nodes[edge];
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// Weighted by resonance of their values
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let sim = if (node.value - target.value).abs() < 10.0 { 5 } else { 0 };
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let w = substrate::resonance(sim);
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sum += target.value * w;
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weight_total += w;
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}
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new_values[i] = if weight_total > 0.0 { sum / weight_total } else { node.value };
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}
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// Phase 2: Apply and check convergence
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for i in 0..graph.nodes.len() {
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let delta = (new_values[i] - graph.nodes[i].value).abs();
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if delta > max_delta { max_delta = delta; }
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graph.nodes[i].value = new_values[i];
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// Decay stability if incoherent
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graph.nodes[i].stability *= 0.99;
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}
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graph.epoch += 1;
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if max_delta < threshold {
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return true; // Converged
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}
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}
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false // Max epochs reached
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}
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}
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// ============================================================================
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// 7. ASSEMBLER (Symbolic Frontend)
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// ============================================================================
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mod assembler {
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use super::isa;
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/// Minimal assembler for the draft runtime
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pub fn assemble(lines: &[&str]) -> Vec<u32> {
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let mut code = Vec::new();
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let mut labels: HashMap<String, usize> = HashMap::new();
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// Pass 1: Labels
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for (i, line) in lines.iter().enumerate() {
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let l = line.trim();
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if l.ends_with(':') {
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labels.insert(l.trim_end_matches(':').to_string(), i);
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}
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}
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// Pass 2: Emit
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for line in lines {
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let l = line.trim();
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if l.is_empty() || l.starts_with(';') || l.ends_with(':') { continue; }
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let parts: Vec<&str> = l.split_whitespace().collect();
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let mnemonic = parts[0];
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match mnemonic {
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"STORE" => {
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let r = parts[1].parse::<u8>().unwrap();
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let v = parts[2].parse::<u8>().unwrap();
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code.push(isa::GlyphInstr::encode(0, 0, 0, 0, isa::GlyphInstr::encode_ops(r, v)));
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}
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"LOAD" => {
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let r = parts[1].parse::<u8>().unwrap();
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let v = parts[2].parse::<u8>().unwrap();
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code.push(isa::GlyphInstr::encode(2, 0, 0, 0, isa::GlyphInstr::encode_ops(r, v)));
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}
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"ADD" => {
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let ra = parts[1].parse::<u8>().unwrap();
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let rb = parts[2].parse::<u8>().unwrap();
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code.push(isa::GlyphInstr::encode(8, 0, 0, 1, isa::GlyphInstr::encode_ops(ra, rb)));
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}
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"HALT" => {
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code.push(isa::GlyphInstr::encode(20, 0, 0, 2, 0));
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}
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_ => {}
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}
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}
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code
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}
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}
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// ============================================================================
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// 8. MAIN ENTRY POINT: THE SYMBOLIC INFERENCE PIPELINE
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// ============================================================================
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fn main() {
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println!("
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███████╗██╗ ██╗██████╗ ██████╗
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██╔════╝╚██╗ ██║██╔══██╗██╔═══██╗
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█████╗ ╚██╗ ██║██████╔╝██║ ██║
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██╔══╝ ╚██╗ ██║██╔═══╝ ██║ ██║
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███████╗ ╚████╔╝ ██║ ╚██████╔╝
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╚══════╝ ╚═══╝ ╚═╝ ╚═════╝
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NEURO-SYMBOLIC RUNTIME v1.0");
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// 1. Hardware Diagnostic
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let profile = diag::probe();
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diag::print_report(&profile);
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// 2. Initialize HAL
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let hal = hal::HalContext::init(profile.has_npu, profile.has_gpu);
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println!("
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[HAL] Active Backend: {}", hal.active.name());
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// =========================================================================
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// PIPELINE A: Declarative Symbolic Inference (The "vLLM" Alternative)
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// Instead of predicting tokens via softmax, we converge a constraint graph.
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// =========================================================================
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println!("
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--- PHASE 1: DECLARATIVE INFERENCE (Substrate Evaluator) ---");
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let mut graph = evaluator::Graph::new();
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// Prompt: "Resolve the equilibrium between conflicting symbolic constraints"
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let n1 = graph.add_node(10.0); // Concept A
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let n2 = graph.add_node(90.0); // Concept B (Conflicting)
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let n3 = graph.add_node(50.0); // Mediator Node
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graph.connect(n1, n3);
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graph.connect(n2, n3);
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let start = Instant::now();
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let converged = evaluator::evaluate(&mut graph, 1000);
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let duration = start.elapsed();
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println!("Inference Status: {}", if converged { "CONVERGED (Equilibrium Reached)" } else { "DIVERGED" });
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println!("Epochs Run : {}", graph.epoch);
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println!("Time Elapsed : {:?}", duration);
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println!("Resolved State : Node 1={:.2}, Node 2={:.2}, Mediator={:.2}",
|
|
graph.nodes[n1].value, graph.nodes[n2].value, graph.nodes[n3].value);
|
|
|
|
// =========================================================================
|
|
// PIPELINE B: Imperative Grounded Execution (The Kernel/VM)
|
|
// Execute the verified symbolic output deterministically.
|
|
// =========================================================================
|
|
println!("
|
|
--- PHASE 2: IMPERATIVE EXECUTION (Glyph VM) ---");
|
|
|
|
let asm_source = vec![
|
|
"STORE 1 42", ; Region 1 gets 42
|
|
"STORE 2 8", ; Region 2 gets 8
|
|
"LOAD 3 1", ; Reg 3 = Region 1[1] (Wait, simplified ASM maps reg to val here for draft)
|
|
"LOAD 4 2", ; Reg 4 = Region 2[2]
|
|
"ADD 3 4", ; Reg 3 = Reg 3 + Reg 4
|
|
"HALT"
|
|
];
|
|
|
|
let bytecode = assembler::assemble(&asm_source);
|
|
let mut vm = vm::VM::new(bytecode);
|
|
|
|
// Pre-load registers to simulate the ASM logic mapping in this simplified draft
|
|
vm.regs[1] = 42;
|
|
vm.regs[2] = 8;
|
|
|
|
let start_vm = Instant::now();
|
|
while vm.running {
|
|
vm.step(&hal);
|
|
}
|
|
let duration_vm = start_vm.elapsed();
|
|
|
|
println!("Execution Status: HALTED gracefully.");
|
|
println!("Ticks Executed : {}", vm.tick);
|
|
println!("Time Elapsed : {:?}", duration_vm);
|
|
println!("Final Register : r[3] = {} (Expected 50)", vm.regs[3]);
|
|
|
|
println!("
|
|
[SYSTEM] Neuro-Symbolic Pipeline Complete. No external dependencies used.");
|
|
} |